The present invention relates to an interface configuration having an interface between a bus system and a unit which is to respond through the bus system.
Such interfaces are known in a large multiplicity of embodiments. Inter alia, they can be a component of a microcontroller in which case they serve, in particular, for the purpose of coordinating access of a CPU of the microcontroller to external peripheral units such as, for example, an external memory, a timer or other devices. However, they can also be constructed for the purpose of being used by units other than the microcontroller for which they are provided. Such xe2x80x9cother unitsxe2x80x9d are referred to below as external processors. In that case, the microcontroller has special pins through which it is possible to make a connection to the interface contained therein, even from outside the microcontroller. Interfaces that are contained in microcontrollers and can be used both by the CPU contained in the relevant microcontroller and by external processors, can certainly be used in many ways but are also known from experience to be relatively slow.
It is accordingly an object of the invention to provide an interface configuration, which overcomes the hereinafore-mentioned disadvantages of the heretofore-known devices of this general type in such a way that an interface can cooperate optimally with units using it even when it is used, or is to be capable of being used, by a plurality of units.
With the foregoing and other objects in view there is provided, in accordance with the invention, an interface configuration, comprising different types of bus systems; and an interface for simultaneously connecting the bus systems to a unit for responding through the bus systems.
The connection to an external peripheral unit through different bus systems can be built up by using this measure. This can be utilized to the effect that different types of units are connected to the external peripheral unit through separate bus systems, and this in turn opens up the possibility of selecting or optimizing the bus systems independently of one another while taking particular and exclusive account of the individual properties of the components to be interconnected.
Consequently, an interface has been found which can cooperate optimally with the units using it even when it is used, or is to be capable of being used, by a plurality of units.
In accordance with another feature of the invention, the interface is a module of a microcontroller.
In accordance with a further feature of the invention, one of the bus systems connects a CPU of the microcontroller to the interface.
In accordance with an added feature of the invention, one of the bus systems permits a particularly efficient communication between the CPU of the microcontroller and the interface.
In accordance with an additional feature of the invention, another of the bus systems connects a unit provided outside the microcontroller to the interface.
In accordance with yet another feature of the invention, the other bus system permits a particularly efficient communication between the unit provided outside the microcontroller and the interface.
In accordance with a concomitant feature of the invention, there is provided a switching device for establishing which of the bus systems is being served by the interface.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in an interface configuration, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.